1. Field of the Invention
The present invention relates to integrated circuit architectures, and particularly, the present invention relates to an analog integrated circuit fabrication architecture with multiple oxide thicknesses and multiple bias voltages, and its related method.
2. Description of the Prior Art
In the modern information society, electronics are used to process, output, and store all kinds of audio and video media. Thus, research in electronics has focused on all kinds of circuits and architectures for processing multimedia electronic signals. As anyone familiar with the art would know, signal processing circuits are typically categorized by digital circuits and analog circuits. And, though the development of new digital circuits is rapid, and maturing every day, the importance of analog circuits (including mixed-signal circuits) has not decreased, but is ever greater than before. For example, in order to digitize robust audio and video, while retaining high quality and low loss, a high-performance, high-speed analog-to-digital converter (ADC) is required, and that ADC is one type of analog (mixed-signal) circuit. Likewise, electronic signals that are transmitted at high speeds (such as high-speed wireless internet signals) and electronic signals accessed from storage devices (such as a disc), all require processing by analog or mixed-signal circuits. In fact, all signals, regardless of being classified as digital or analog, are essentially analog signals, and analog electronic circuits are able to control the analog portions of electronic signals. Thus, developing high-performance, high-speed analog circuits and architectures is a major concern of modern information technology companies.
Anyone familiar with the art knows that traditional digital signals use different signal amplitudes to communicate information. For example, if the signal amplitude is lower than a certain value, then the information is “0”, whereas if the signal amplitude is higher than another value, the information is “1”. Analogously, a signal amplitude of analog signals also represents unique information. Information carried in the analog signal also changes as the signal amplitude of the analog signal rises from low to high. And thus, analog circuits typically stress an ability to process signals with a large amplitude swing or range. In other words, compared with digital circuits, analog circuits and, more importantly, analog circuit architectures should be able to accept a larger signal swing, so as to better process the information in the analog signal. Of course, a critical limiting factor in achieving large swing analog circuits is a bias voltage of the analog circuit. Typically, the larger the bias voltage of the analog circuit, the larger the allowable signal swing. Thus, in the prior art still used in industry, analog circuits are usually biased at a higher voltage than digital circuits.
Generally speaking, circuits biased at higher voltages require architectures with larger geometry devices, such as thick gate oxide metal-oxide-semiconductor (MOS) transistors. Thick gate oxide devices are better able to withstand a high bias voltage environment. However, large geometry thick gate oxide devices have significant disadvantages when used in analog circuits. First, large geometry devices are slower, i.e. have a lower unity gain frequency ft. Large geometry devices also take up more real estate in layout, and drain more power during operation. In order to improve circuit speeds, the industry has tried to introduce scaled down small geometry devices, such as thin gate oxide MOS transistors, to analog circuit architectures. These small geometry devices are faster, require less real estate, and consume less power.
Please refer to FIG. 1 for further explanation of this prior art. FIG. 1 is a block diagram of an analog circuit architecture of the prior art, which could for example be a mixed-technology, dual gate analog-to-digital converter (ADC) 100. In the analog circuit architecture, the prior art adopts a single bias voltage environment (such as 3.3V). Thus, most devices in the architecture are thick gate oxide devices suited to the higher bias voltage environment. One example of the devices suited to a 3.3V bias voltage would be 0.35 um MOS transistors. In FIG. 1, a first circuit 120 and a second circuit 140 are both formed of thick gate oxide devices of this type. Yet, to make up for the relatively slower speed of the thick gate oxide devices, the prior art also includes a minority of thin gate oxide devices, such as 0.18 um MOS transistors. A third circuit 160 is made up of such thin gate oxide small geometry devices.
Although the circuit architecture of FIG. 1 attempts to introduce small geometry devices, as one familiar with the art would know, thin gate oxide transistors typically are more suited to lower bias voltage environments. For example, a gate oxide layer of thin oxide transistors is relatively thinner, and cannot withstand large signals in a high bias voltage environment, but can only be used in a relatively lower bias voltage environment. However, as shown in FIG. 1, because the circuit architecture of the prior art only provides the high bias voltage, when small geometry devices are introduced, these thin gate oxide transistors must be protected by large geometry devices, and cannot be connected directly to the bias voltage. In other words, 0.18 um small geometry devices, which are typically biased at 1.8V, cannot be directly connected to 3.3V, but instead must be protected by 0.35 um devices before the 0.18 um devices can operate correctly. In this way, small geometry devices are limited in their scope of use in analog IC design. Small geometry devices cannot be used extensively, and thus cannot make a large impact on the overall effectiveness of analog circuits.